Read this document before installing or attempting to use the IC697CPM790-AA PLC CPU Module. For more information, refer to the applicable Programmable Controller Installation manual, Programming Software User’s Manual, Programmable Controller Reference Manual, and the IC66* Modular Redundancy Flexible Triple Modular Redundant (TMR) System).
If Release 6.01 PLC CPU firmware is used with IC641 programming software Release 4.01 or 4.02, the PLC Sweep Control and Monitor screen (F3 F8) should ONLY be used to change (tune) the constant window or constant sweep time. Any other use may result in the background window time being incorrectly set to 255 milliseconds. For those IC641 programming software releases used with a Release 6.01 CPU, the configuration package must be used to set the desired sweep modes or window times.
Microcycle mode is a new sweep mode beginning with Release 6.00 CPUs. In this mode, the PLC keeps the time interval between I/O scans constant (for a further description of Microcycle mode see New Features and Functionality, Microcycle Sweep Mode) – actually the start of sweep time is maintained as a fixed interval. In keeping the time interval between I/O scans constant, the CPU must know the amount of the sweep to be allocated to the output scan. Under normal operating situations, the amount of time required to complete the previous sweep’s output scan is used to estimate the amount of time required to complete this sweep’s output scan.
Obviously, this manner of estimating the amount of time required for the output scan does not work for the first output scan of the IC697 PLC. Since no previous sweep’s output scan time is available, the Release 6.xx CPU will estimate the output scan time based upon the configured base cycle time. The first output scan will be estimated as one-third of the configured base cycle time. (for example, if the base cycle time is configured to be 60 milliseconds, then the first output scan will be estimated as requiring 20 milliseconds). When programming for first scan, ensure that the logic to be performed in a given program will complete prior to the next execution time for that same program.
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